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About

Alper Yazar

Hi!

I am Alper Yazar and I am Ph.D. Candidate and Electronics Engineer. ORCID: 0000-0002-0904-9623 Publons:E-7451-2019

Contact - İletişim

EN: Please visit the Contact page.

TR: Lütfen İletişim sayfasını ziyaret ediniz.

Education

  • Ph.D., Electrical and Electronics Engineering, Middle East Technical University (METU), Ankara, TURKEY, 2022 (Expected). CGPA: 3.75/4.00
    • Area of Study: Heterogeneous Architectures, Accelerated Clouds
    • Advisor: Prof. Ece Güran Schmidt
    • Minor Field: Telecommunication
  • M.Sc., Electrical and Electronics Engineering, Middle East Technical University (METU), Ankara, TURKEY, 2015. CGPA: 3.64/4.00
    • Thesis Topic: Application of F-test Method on Model Order Selection and Related Problems. Link
    • Advisor: Prof. Çağatay Candan
    • Area of Study: Statistical Signal Processing
  • B.Sc., Electrical and Electronics Engineering, Middle East Technical University (METU), Ankara, TURKEY, 2012. CGPA: 3.93/4.00
    • Specialization: Computers and Telecommunication

Professional Experience

  • Project Co-manager. ACCLOUD, April 2018 to present.
  • Electronics Engineer. ASELSAN, Ankara, TURKEY, August 2012 to present.
  • Intern. ASELSAN, Ankara, TURKEY, June 2011 to July 2011.
  • Intern. Bosch Rexroth, Bursa, TURKEY, June 2010 to July 2010.

Patents

  • Yazar, A. Düşük Sızıntı Akımlı Anlık Tetik Girişli Yapılandırılabilir Mandal Devresi. TR 2016 09051 B
  • Yazar, A. A Configurable Latch Circuit with Low Leakage Current and Instant Trigger Input. PCT/TR2017/050233, WO/2018/004496 1 Link

Publications

Thesis

  • M.Sc. Yazar, A. (2015). Application Of F-Test Method On Model Order Selection And Related Problems (Middle East Technical University). Link

Conference

  • Erol, A., Yazar, A., & Schmidt, E. G. (2019, July). OpenStack Generalization for Hardware Accelerated Clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. Link
  • Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, July). Resource Allocation for Minimized Power Consumption in Hardware Accelerated Clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. Link
  • Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, April). ACCLOUD-MAN-Power Efficient Resource Allocation for Heterogeneous Clouds. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. Link
  • Koltuk, F.,Yazar, A., & Schmidt, E. G. (2019, April). CLOUDGEN: Workload Generation for the Evaluation of Cloud Computing Systems. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. Link
  • Erol, A., Yazar, A., & Schmidt, E. G. (2019, April). A Generalization of OpenStack for Managing Heterogeneous Cloud Resources. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. Link
  • Yazar, A. (2018, June). Bir Açık Kaynak Kodlu Gerçek Zamanlı İşletim Sistemi (FreeRTOS) ile Gömülü Yazılım Geliştirme Çalışmaları. In 2018 9th Savunma Teknolojileri Kongresi (SAVTEK).
  • Yazar, A., Erol, A., & Schmidt, E. G. (2018, May). ACCLOUD (Accelerated CLOUD): A novel FPGA-Accelerated cloud archictecture. In 2018 26th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. Link
  • Yazar, A., Candan, Ç. (2015, May). Analysis window length selection for linear signal models. In 2015 23nd Signal Processing and Communications Applications Conference (SIU) (pp. 1301-1304). IEEE. Link

Poster

  • Yazar, A., Candan, Ç. (2015, March). Model Order Selection Using F-Test. In 2015 METU EEE Graduate Research Workshop (GRW).

Other

  • Yazar, A. (2017) Compiled Lecture Notes of EE533 Information Theory. PDF.
  • Yazar, A. (2014) Compiled Lecture Notes of EE604 Sensor Array Signal Processing. PDF.

Awards and Honors

  • 2012-2015. TUBITAK 2228-National MSc and PhD Scholarship Programme for Senior Undergraduate Students
  • 2011. Capstone Design Project Honorable Mention Award
  • 2011. Bulent Kerim Altay Award. About
  • 2011. Bulent Kerim Altay Award. About
  • 2010. Bulent Kerim Altay Award. About
  • 2010. Bulent Kerim Altay Award. About
  • 2008. Bulent Kerim Altay Award. About
  • 2008-2011. Dean’s List.

Projects

Funded

  • 2018-present. Project co-manager of ACCLOUD

Hobby

Class

  • Ph.D., METU
    • EE542 Computer Networks. Evaluation and minor improvements on ClassBench
    • CENG513 Wireless Communication and Networks. A load balancing algorithm for multi-user multiple access point wireless networks
  • M.Sc., METU
    • EE604 Sensor Array Signal Processing. Implementation and evaluation of two source localization methods on MATLAB: Triangulation and RSS
  • B.Sc., METU
    • EE493, EE494 Engineering Design. Being a member of a team with four members, designed a voice controlled car capable of auto collision avoidance. Speech processing was done using MATLAB on a PC. Commands were transferred to car over RF channel. An RF communication protocol was developed top on FSK modulation.
    • EE430 Digital Signal Processing. Designed and implemented FSK based communication system over acoustic air channel using MATLAB and standard microphone/speaker of a PC.
    • EE314 Digital Electronics Laboratory. Designed clone of "Space Invaders" game on FPGA board with VGA output using Verilog as HDL an XilinX ISE tools.
    • EE313 Analog Electronics Laboratory. Designed an OPAMP using discrete transistors and passives.
    • EE214 Electronic Circuits Laboratory. Designed a DC-DC boost converter using discrete components.
    • EE213 Electrical Circuits Laboratory. Designed RGB color sensor using OPAMPs and discrete components.

Trainings

w/ Certificate

Class

  • 2018. FreeRTOS Real-Time Programming. Doulos, 3 days.
  • 2017. Developing with Embedded Linux. Doulos, 4 days.
  • 2016. The Programmable Logic Training Course Professional ZYNQ. PLC2, 5 days.
  • 2016. The Programmable Logic Training Course Professional VHDL. PLC2, 5 days.
  • 2014. Mentor Graphics DxDesigner Training Course. CDT on behalf of Mentor Graphics, 2.5 days.
  • 2014. EMC Seminar. Würth Elektronik GmbH, 1 day.
  • 2014. Power Seminar. Linear Technology, 1 day.
  • 2013. C6000 Embedded Design Workshop using BIOS, Texas Instruments, 5 days.

w/o Certificate

Class

  • 2016. Power and Analog Applications, EMPA on behalf of Texas Instruments, 1 day.
  • 2016. Basics of VxWorks, ASELSAN, 5 days.
  • 2016. Vivado HLS, PLC2, 1 day.
  • 2015. Mentor Graphics Workshop Day, CDT, 1 day.
  • 2015. Easy Start FPGA, PLC2, 1 day.
  • 2014. Mentor Graphics Workshop Day, CDT, 1 day.

Online

Todo

To be written...

Memberships

  • Past. IEEE
  • Past. IEEE Robotics and Automation Society
  • Past. IEEE Signal Processing Society
  • Past. IEEE ODTÜ
  • Past. ODTÜ KTMT

Personal Activities

  • Trying playing various musical instruments

Old Pages


  1. After successful technical examination including originality, application to eligible countries is cancelled due to financial issues. 


Last update: 2020-06-27